In recent years, a variety of highly advanced electronic devices using a compound semiconductor such as GaAs in an active region have been developed. Crystallinity of the compound semiconductor has a great impact on the performance or the electronic device, and so it is required to form a compound semiconductor having superior crystallinity. For example, when an electronic device using a GaAs-based compound semiconductor in an active region is manufactured, a crystalline thin film is epitaxially grown on a GaAs wafer, or a Ge wafer that can have a lattice match with the compound semiconductor to achieve a crystalline thin film having high quality.
For example, Patent Document 1 discloses a compound semiconductor epitaxial wafer and a compound semiconductor device in which a GaAs wafer, an AlGaAs buffer layer, a GaAs channel layer, and a GaAs contact layer are arranged in the stated order. The crystalline thin films made of the compound semiconductors are formed by vapor-phase epitaxy.
Non-Patent Document 1 discloses that the crystallinity of a Ge crystalline thin film having been epitaxially grown on a Si wafer (base wafer) can be improved by performing cycle thermal annealing on the Ge crystalline thin film. For example, a Ge crystalline thin film having an average dislocation density or 2.3×106 cm−2 can be yielded by performing thermal annealing at the temperature of 800° C. to 900° C. Here, the average dislocation density is introduced as an exemplary lattice defect density.    Patent Document 1: JP 11-345812 A    Non-Patent Document 1: Hsin-Chiao Luan et al., “High-quality Ge epilayers on Si with low threading-dislocation densities,” APPLIED PHYSICS LETTERS, VOLUME 75, NUMBER 19, 8 Nov. 1999